Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design)

The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techniques. It leads readers through someof the most intricate protocols used in complex multiprocessor caches. Written in an accessible, informal style, this text demystifies cache memory design by translating cache concepts and jargon into practical methodologies and real-life examples. It also provides adequate detail to serve as a reference book for ongoing work in cache memory design.
The Second Edition includes an updated and expanded glossary of cache memory terms and buzzwords. The book provides new real world applications of cache memory design and a new chapter on cache"tricks".

Key Features
* Illustrates detailed example designs of caches
* Provides numerous examples in the form of block diagrams, timing waveforms, state tables, and code traces
* Defines and discusses more than 240 cache specific buzzwords, comparing in detail the relative merits of different design methodologies
* Includes an extensive glossary, complete with clear definitions, synonyms, and references to the appropriate text discussions

Customer Review: What to learn deeply about PC hardware? Buy this book!

This book (hard cover) is the ultimate reference about memory cache architecture. If you want to learn deeply how this circuit works, this book is perfect. It covers also the architecture of RAM memory.

Customer Review: In-depth coverage of CPU cache architectures

Being a digital design engineer, I wanted a book that would provide an insight into the way caches are used to solve the classic memory bandwidth problem. This book completely matched my expectations and more! It starts with a overview chapter that already touches most aspects that are involved with cache functionality. It ends with a real-world schematic of a simple (but working!) cache implementation of a 68020 procesor. The second chapter is a killer one and focusses in-depth on the tricks that can be used for squeeze more performance out of the basic cache implementation and the issue that might pop up. The first two chapters contained the information that I was really looking for. Chapter three handles some differences between RISC and CISC processor. Only 11 pages, a bit dated. Chapter four concentrates on cache coherency in multi-processor designs and some ways to solve problems. These are topics that I didn't have to deal with in the past. Interesting stuff! Finally, a chapter is devoted to some tricks that have been used to solve very specific problems. I found the book is balanced, well written and was detailed enough to satisfy my needs.
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